Design of a Motor Speed Sampling, Amplification, Filtering and Display Circuit

| April 20, 2015

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Faculty of Technology and Environment

 

Coursework Title:

Design of a Motor Speed Sampling, Amplification, Filtering and Display Circuit

           

Module Name:              Analogue and Digital Electronics

Module Code:            4004ELE

Level:                          4                                

Credit Rating: 20

Weighting:                 15%

Maximum mark available:    100

Lecturer:                    Wei Zhang, Mo Ahmed

Contact:                     If you have any issues with this coursework you may contact your lecturer. Contact details are:

Email:

Room: 519a; 517

Hand-out Date:          05 February 2015

Hand-in Date:             04 May 2015

Hand-in Method:        via Blackboard

Feedback Date:         25 may 2015

Feedback Method:    via Blackboard

Programmes:             Beng (Hons) Electrical & Electronic Engineering

Meng (Hons) Electrical & Electronic Engineering

 

 

Introduction

 

The objective is to design the circuits used for motor speed sampling, amplification, filtering and display. In this assignment, students are required to

  • practice analogue and digital circuit design and optimization
  • build a current amplifier circuit
  • design a low-pass filter
  • build a 7-segment display decoder
  • display the output on the seven-segment display
  • simulate the design in Proteus

 

 

Learning Outcome to be assessed

 

LO1 Analyse electronics by using diode and transistor characteristics for simple amplifier design.

LO2 Describe circuits design for analogue signal processing.

LO3 Examine electronics through analysing and designing basic combinational digital circuits.

LO4 Identify sequential digital circuits and applications.

 

 

Detail of the task

 

Analogue:

A remote motor speed sensor provides a DC current signal in the range of -2.5 to 2.5 mA. Design a circuit to convert this signal into a DC voltage signal in the range from 2 to 3 V. After the conversion, a low pass filter is used to suppress any noise AC signals with frequency higher than 100 Hz.

 

Digital:

A 8-bit digital-to-analogue converter should be used to convert the output of the above analogue circuit into an 8-bit digital signal. The 8-bit signal should go through the 4-7 decoder so that the value of the 8-bit digital signal are displayed in two-bit hex decimal accordingly on two seven segment display devices to indicate the safe running speed of the motor in 0-255 scales.

 

Part 1: Design a current sampling, amplification and filtering circuit.

 

Use an AC current source with a very low frequency of 0.01 Hz to emulate the slowly changed DC current output signal from the remote motor speed sensor. Design the current sampling/amplification circuit using appropriate circuits so that you can achieve the required output voltage. Demonstrate the gain, Bandwidth, Rin of your op-amp circuits by both calculation and simulation.

 

Design the low-pass filter. Demonstrate the bandwidth of the filter by both calculation and simulation.

 

Combine the op-amp and the filter. Demonstrate the gain, Bandwidth, phase shift, Rin of your combined circuit by both calculation and simulation.

 

Marks allocation:

  1. Current sampling/amplification circuit: [10%]
  2. Low-pass filter circuit:                                                                                                          [10%]
  3. Combined circuit:                                                                           [10%]

 

Part 2: Design a 8-bit counter and a 4-to-7 decoder for the Seven-Segment display.

 

The output voltage signal from the analogue circuit should then be converted into an 8-bit digital signal, which represents the levels of the motor speed.  You can choose the generic 8-bit ADC device from the Proteus library => Modelling Primitives => ADC_8 for this task. Following is an example connection of the ADC convertor that you can refer to when you design your circuit.

 

Design a 8-bit synchronous counter by using D-type flip-flops. The counter should be driven by a CLK signal running at 256k Hz. You should show how the counter is designed, and simulate the circuit.

Marks allocation:                                                                                                                                                    [20%]

The MSB output of the counter should be used to connect to the clock terminal of ADC_8 converter. The value of the output of the adc_8 converter should be displayed in two 7-segment display units, the MSB four bits are displayed in one and the LSB four bits in another. In order to achieve this, you should design the 4-to-7 decoder for the 7-segment display, as detailed below.

 

A 7-segment display decoder is commonly used to display a particular number representation using a display composed of seven LED segments. The diagram below represents a 7-segment display decoder which converts a 4-bit binary number into a collection of symbols to be displayed:

 

Your 7-segment decoder should accept a 4-bit binary numbers [x3, x2, x1, x0], which represents integer numbers 0 – 9 and letter A, B, D d, E, F. The decoder should output signals “0” to drive the appropriate segments (a-g) of a standard 7-segment display as shown above. The symbols used should be:

 

 

 

Complete the truth table for the 4-to-7 decoder: Use Karnaugh map to simply the logic expressions for the 4-to-7 decoder. You should convert the expressions from SOP form to POS form so that you can make use of the NAND gates only.  Simulate your decoder circuit and demonstrate that the circuit is working properly.                                                                                                                                                                       [20%]

 

Connect the 8-bit counter outputs to two 4-7 decoders which drive two seven-segment display units, respectively.  Simulate the circuit and demonstrate that entire circuit works properly.                               [10%]

 

You could use the logic components in the Proteus library TTL/74LS:

 

D Flip-Flop:              74LS74N

2-input AND gate:    74LS08N                               Inverter:                   74LS04N

2-input NAND gate: 74LS00N                               3-input NAND gate: 74LS10N

4-input NAND gate: 74LS20N                                XOR gate:                74LS86N

 

What you should hand in

 

Once you have completed the designs, prepare for the submission process. You are required to submit a lab report (less than 10 pages) including:

 

  • The detailed description and calculation of your design.
  • Circuit schematic with clear comments.
  • The simulation results, waveforms.
  • Discussions of your design problems, methods of improvement and conclusions.

 

Refer to the report marking scheme for the detailed requirements.

 

If your circuit is not completely functional by the due date, you should turn in what you have to receive partial credit. Late submission will be penalised. Refer to the assignment marking scheme for details.

 

 

Marking Scheme/Assessment Criteria

 

Introduction and Analysis                                                                                                                      (10%)

Has a clear set of aims and objectives been presented?

Has a detailed description of the design been included?

 

Circuit Design Result (as detailed in the coursework specification)                                             (80%)

Have the structure and functionality of the design been clearly explained?

Has the design been carried out following the correct procedure and the result clearly explained?

 

Conclusions and Report Quality                                                                                                            (10%)

Has a reasoned evaluation been made of the work in the report?

Have rational and appropriate conclusions been drawn?

 

 

Recommended reading

 

Author Floyd, T. L.

Publishing Year 2003

Title Electronics Fundamentals

Subtitle

Edition 8th

Publisher Pearson Education

ISBN 9781292025681

AA

Author Floyd, T. L.

Publishing Year 2009

Title Digital Fundamentals

Subtitle

Edition 10th

Publisher Pearson Prentice Hall

ISBN 9780132359238

AA

Author Boylestad, R. L. and Nashelsky, L.

Publishing Year 2013

Title Electronic Devices and Circuit Theory

Subtitle

Edition 11th

Publisher Pearson Education

ISBN 9780133058017

 

Extenuating Circumstances

If something serious happens that means that you will not be able to complete this assignment, you need to contact the module leader as soon as possible.  There are a number of things that can be done to help, such as extensions, waivers and alternative assessments, but we can only arrange this if you tell us.  To ensure that the system is not abused, you will need to provide some evidence of the problem.

More guidance is available at http://www.ljmu.ac.uk/student-administration/126427.htm

Any coursework submitted late without the prior agreement of the module leader will receive 0 marks.

Academic Misconduct

The University defines Academic Misconduct as ‘any case of deliberate, premeditated cheating, collusion, plagiarism or falsification of information, in an attempt to deceive and gain an unfair advantage in assessment’.  This includes attempting to gain marks as part of a team without making a contribution.  The Faculty takes Academic Misconduct very seriously and any suspected cases will be investigated through the University’s standard policy (Academic Misconduct).  If you are found guilty, you may be expelled from the University with no award.

It is your responsibility to ensure that you understand what constitutes Academic Misconduct and to ensure that you do not break the rules.  If you are unclear about what is required, please ask.

 

For more information you are directed to following the University web pages:

 

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